Effect of Al2O3 Seed-Layer on the Dielectric and Electrical Properties of Ultrathin MgO Films Fabricated Using In Situ Atomic Layer Deposition
J Acharya and R Goul and D Romine and R Sakidja and J Wu, ACS APPLIED MATERIALS & INTERFACES, 11, 30368-30375 (2019).
Metal/insulator/metal (M/I/M) trilayers of Al/MgO/Al with ultrathin MgO in the thickness range of 2.20-4.40 nm were fabricated using in vacuo sputtering and atomic layer deposition (ALD). In order to achieve a high-quality metal/insulator (M/I) interface and hence high-quality dielectric ALD-MgO films, a 5 cycles (similar to 0.55 nm) thick ALD- Al2O3 seed layer (SL) was employed to demonstrate the dielectric constant (epsilon(r)) is similar to 8.82-9.38 in 3.30-4.95 nm thick ALD- MgO/SL films, which is close to that of single-crystal MgO epsilon(r) similar to 9.80. In contrast, a low epsilon(r) of 3.55-4.66 for the ALD- MgO films of a similar thickness without a SL was observed. The effective oxide thickness (EOT) of similar to 1.40 nm has therefore been achieved in the ultrathin ALD-MgO films, which are comparable to the EOTs of high-K dielectrics such as HfO2. In addition, the leakage current through the M/I/M structure is reduced by more than 1 order of magnitude with implementation of the SL. The high leakage current in the samples without a SL can be attributed to the nonuniform nucleation of the ALD-MgO on the Al surface with a significant portion of the Al surface remaining conductive as confirmed using in vacuo scanning tunneling spectroscopy (STS). With the SL, the STS study has confirmed a tunnel barrier height of 1.50 eV on 0.55 nm MgO with 0.55 nm Al2O3 SL with almost 100% coverage. In addition, molecular dynamics simulations point out the importance of deposition of ultrathin SL that has a significant effect on the initial nucleation of the Mg precursor. This result not only illustrates the critical importance of controlling the M/I interface to obtain high-quality dielectric properties of ultrathin ALD films but also provides an approach to engineering incompatible M/I interfaces using a SL for a high-quality dielectric required for applications in M/I/M tunnel junctions and complementary metal oxide semiconductors.
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