Moire Valleytronics: Realizing Dense Arrays of Topological Helical Channels
C Hu and V Michaud-Rioux and W Yao and H Guo, PHYSICAL REVIEW LETTERS, 121, 186403 (2018).
We propose a general and robust platform, the moire valleytronics, to realize high-density arrays of 1D topological helical channels in real materials at room temperature. We demonstrate the idea using a long- period 1D moire pattern of graphene on hBN by first-principles calculation. Through calculating the Berry curvature and topological charge of the electronic structure associated with various local graphene/hBN stackings in the moire pattern, it is revealed that the helical channel arrays originate intrinsically from the periodic modulation of the local topological orders by the moire pattern. For a freestanding wavelike moire pattern, two groups of helical channel arrays are spatially separated out of plane, validating the structural robustness of the moire topology. The generality and experimental feasibility of moire valleytronics are demonstrated by investigating a broad range of moire systems.
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